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COURSE INFORMATION
Course CodeCourse TitleL+P HourSemesterECTS
BCT 127DIGITAL ELECTRONICS2 + 01st Semester4

COURSE DESCRIPTION
Course Level Associate's Degree
Course Type Compulsory
Course Objective The aim of this course is to teach basic logic circuits, compound logic circuits and arithmetic logic circuits.
Course Content Number Systems, Logic Gate Circuits, Boolean algebra, Karnaugh map Encoders (Encoder), Decoders (Decoder), Data Selectors (Multiplexer), Data Distributors (demultiplexer), Adders, Subtractors, Comparators
Prerequisites No the prerequisite of lesson.
Corequisite No the corequisite of lesson.
Mode of Delivery Face to Face

COURSE LEARNING OUTCOMES
1Establish the basic logic circuits
2To simplify the basic logic circuits
3Compound build logic circuits
4Build arithmetic logic circuits.

COURSE'S CONTRIBUTION TO PROGRAM
PO 01PO 02PO 03PO 04PO 05PO 06PO 07PO 08PO 09PO 10PO 11PO 12PO 13PO 14
LO 001 4    45 5    
LO 002 4    45 5    
LO 003 4    45 5    
LO 004 4    45 5    
Sub Total 16    1620 20    
Contribution04000045050000

ECTS ALLOCATED BASED ON STUDENT WORKLOAD BY THE COURSE DESCRIPTION
ActivitiesQuantityDuration (Hour)Total Work Load (Hour)
Course Duration (14 weeks/theoric+practical)14228
Hours for off-the-classroom study (Pre-study, practice)14342
Mid-terms11616
Final examination11818
Total Work Load

ECTS Credit of the Course






104

4
COURSE DETAILS
 Select Year   


 Course TermNoInstructors
Details 2023-2024 Fall1HÜSEYİN ÖZGÜNGÖR


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Course Details
Course Code Course Title L+P Hour Course Code Language Of Instruction Course Semester
BCT 127 DIGITAL ELECTRONICS 2 + 0 1 Turkish 2023-2024 Fall
Course Coordinator  E-Mail  Phone Number  Course Location Attendance
Lecturer HÜSEYİN ÖZGÜNGÖR hozgungor@pau.edu.tr DTMYO E0006 %60
Goals The aim of this course is to teach basic logic circuits, compound logic circuits and arithmetic logic circuits.
Content Number Systems, Logic Gate Circuits, Boolean algebra, Karnaugh map Encoders (Encoder), Decoders (Decoder), Data Selectors (Multiplexer), Data Distributors (demultiplexer), Adders, Subtractors, Comparators
Topics
WeeksTopics
1 Number Systems
2 Conversion of Number Systems
3 Logic gate circuits
4 Boolean Algebra
5 Simplifying logic functions and implementing logic gates
6 Karnaugh Map
7 Combinational logic circuit design
8 Encoders
9 Decoders
10 Multiplexers
11 Demultiplexers
12 Adders
13 Subtractors
14 Comparators
Materials
Materials are not specified.
Resources
Course Assessment
Assesment MethodsPercentage (%)Assesment Methods Title
Final Exam50Final Exam
Midterm Exam50Midterm Exam
L+P: Lecture and Practice
PQ: Program Learning Outcomes
LO: Course Learning Outcomes