PAÜ .:. Eğitim Öğretim Bilgi Sistemi

COURSE INFORMATION

Course Code	Course Title	L+P Hour	Semester	ECTS
EEEN 425	VERY LARGE SCALE INTEGRATION (CMOS VLSI)	3 + 0	8th Semester	4

COURSE DESCRIPTION

Course Level	Bachelor's Degree
Course Type	Elective
Course Objective	Description of working principals of subtreshold, linear and saturation region of NMOS and PMOS transistors. Realization of layout of CMOS based circuits with TANER program. Teaching of ac and dc analysis of CMOS. Providing CMOS based design. Teaching of CMOS analog and digital circuit design.
Course Content	MOS transistor theory. CMOS processing technology. Layout design rules and examples with TANER. Transistor circuit modeling. Small signal analysis of CMOS circuits. Differential amplifiers. CMOS operational amplifiers. CMOS digital circuits. CMOS switch logic. CMOS buffer. CMOS memory.
Prerequisites	No the prerequisite of lesson.
Corequisite	No the corequisite of lesson.
Mode of Delivery	Face to Face

COURSE LEARNING OUTCOMES

1	One can understand integrated MOS (NMOS and PMOS) transistor theory
2	One can perform examples and layout with TANER
3	One can perform modeling with CMOS transistor circuits
4	One can perform small signal analysis of CMOS circuits
5	One can perform analysis of differential amplifiers
6	One can perform analysis of operational amplifiers
7	One can perform analysis of digital circuits
8	One can perform design of buffer and memory

COURSE'S CONTRIBUTION TO PROGRAM

	PO 01	PO 02	PO 03	PO 04	PO 05	PO 06	PO 07	PO 08	PO 09	PO 10	PO 11
LO 001	2	3	4			2		2	3	4	4
LO 002		5	1	2	4	5	3	4		4	2
LO 003	3	5	1	4	1	4	1	2	2	2	2
LO 004	4	5	2	3	2	2	2			3	2
LO 005	3	5	3	3	2	2	2			3	2
LO 006	3	5	3		4	1	1				2
LO 007	3	5	4	4	3	1	1				2
LO 008		2	1	2	1	1	1				2
Sub Total	18	35	19	18	17	18	11	8	5	16	18
Contribution	2	4	2	2	2	2	1	1	1	2	2

ECTS ALLOCATED BASED ON STUDENT WORKLOAD BY THE COURSE DESCRIPTION

Activities	Quantity	Duration (Hour)	Total Work Load (Hour)
Course Duration (14 weeks/theoric+practical)	14	3	42
Hours for off-the-classroom study (Pre-study, practice)	14	3	42
Mid-terms	1	6	6
Final examination	1	14	14
Total Work Load ECTS Credit of the Course			104 4

COURSE DETAILS

Select Year

Course Details

Course Code	Course Title	L+P Hour	Course Code	Language Of Instruction	Course Semester
EEEN 425	VERY LARGE SCALE INTEGRATION (CMOS VLSI)	3 + 0	2	Turkish	2020-2021 Fall

Course Coordinator	E-Mail	Phone Number	Course Location	Attendance
Prof. Dr. ERKAN YÜCE	eyuce@pau.edu.tr		MUH A0312	%70

Goals		Description of working principals of subtreshold, linear and saturation region of NMOS and PMOS transistors. Realization of layout of CMOS based circuits with TANER program. Teaching of ac and dc analysis of CMOS. Providing CMOS based design. Teaching of CMOS analog and digital circuit design.
Content		MOS transistor theory. CMOS processing technology. Layout design rules and examples with TANER. Transistor circuit modeling. Small signal analysis of CMOS circuits. Differential amplifiers. CMOS operational amplifiers. CMOS digital circuits. CMOS switch logic. CMOS buffer. CMOS memory.

Topics

Materials

Materials are not specified.

Resources

Resources	Resources Language
ders notları	Türkçe

Course Assessment

Assesment Methods	Percentage (%)	Assesment Methods Title
Final Exam	60	Final Exam
Midterm Exam	40	Midterm Exam

L+P: Lecture and Practice
PQ: Program Learning Outcomes
LO: Course Learning Outcomes

Prospective Student